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By Condon E. U.

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The graphical symbols for both types of jfet are given in Fig. 16. The jfet takes a significant drain current with zero gate bias and, for an n-channel device, a negative bias is required to cut the current off. When the fet is used as an amplifier the gate bias is normally between zero and cut-off and lies outside the range of the drain-source voltage; for example typical voltages are Vg = –1 V, Vs = 0 and Vd = +20 V. Devices with this property are said to operate in the depletion mode. By contrast, the base bias voltage for a bipolar transistor lies between that of the emitter and the collector.

30. Structure and circuit symbol for a gate turn-off thyristor Fig. 31. An optically-coupled triac and thyristor ensure that latching takes place. To turn the thyristor off, a negative ( –10 V) voltage must be applied between the gate and cathode. The gate turn-off pulse circuit must be capable of absorbing a short (1 ␮s) pulse of current near to the value of the anode current to ensure that turn-off occurs. Optically-coupled triac and thyristors These devices feature a low-power triac or thyristor which is triggered by an LED included in the same package.

The properties of such a network are expressed in a number of ways notably as z parameters, y parameters or h parameters. The basic equations for these Basic principles of transistors 31 Fig. 8(a). A set of Ic Ð Vc characteristics for a common-base amplifier Fig. 8(b). Typical collector currentÐcollector voltage characteristics for common-emitter connection 32 Principles of Transistor Circuits Fig. 9. Ic ÐVbe curves for a silicon transistor parameters are given in Appendix B and this shows that these parameters, in spite of their variety, express the same four properties of the network, namely its input resistance, output resistance, forward gain and reverse gain.

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